The SPACES project is a Japanese-French joint research project that aims to establish a new security evaluation methodology for cryptographic devices. We introduce one of the SPACES project outcomes associated with the development of the security evaluation platform for cryptographic devices. The new feature of the proposed system is to include a newly-developed Side-channel Attack Standard Evaluation Board (SASEBO) and a fault-injection module based on a glitchy-clock generator implemented in an FPGA on the SASEBO. We also show that we can efficiently collect and analyze the side-channel information with the proposed system.