E. Helmut and . Graeb, Analog Layout Synthesis -A Survey of Topological Approaches, 2011.

S. Kirkpatrick, C. D. Gelatt, and M. P. Vecchi, Optimization by Simulated Annealing, Science New Series, vol.220, issue.4598, pp.671-680, 1983.
DOI : 10.1142/9789812799371_0035

URL : http://www.cs.virginia.edu/cs432/documents/sa-1983.pdf

Q. Ma, L. Xiao, Y. Tam, and E. F. Young, Simultaneous Handling of Symmetry, Common Centroid, and General Placement Constraints, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, pp.85-95, 2010.
DOI : 10.1109/TCAD.2010.2064490

URL : http://www.cse.cuhk.edu.hk/%7Efyyoung/paper/tcad11_analog.pdf

N. Lourenço, A. Canelas, R. Póvoa, R. Martins, and N. Horta, Floorplanaware analog IC sizing and optimization based on topological constraints, Integration, the VLSI Journal, pp.183-197, 2015.

R. He and L. Zhang, Symmetry-aware TCG-based placement design under complex multi-group constraints for analog circuit layouts, Proc. ASP-DAC, pp.299-304, 2010.

L. Xiao and E. F. Young, Analog placement with common centroid and 1-D symmetry constraints, 2009 Asia and South Pacific Design Automation Conference, pp.353-360, 2009.
DOI : 10.1109/ASPDAC.2009.4796506

URL : http://www.cse.cuhk.edu.hk/%7Elfxiao/aspdac09_analog.pdf

A. Unutulmaz, G. Dündar, and F. V. Fernández, On the convex formulation of area for slicing floorplans, Integration, the VLSI Journal, pp.74-80, 2015.
DOI : 10.1016/j.vlsi.2015.01.008

M. P. Lin, Y. Chang, and C. Hung, Recent research development and new challenges in analog layout synthesis, 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC), pp.617-622, 2016.
DOI : 10.1109/ASPDAC.2016.7428080

S. M. Saif, M. Dessouky, M. W. El-kharashi, H. Abbas, and S. Nassar, Pareto front analog layout placement using Satisfiability Modulo Theories, DATE 2016, pp.1411-1416, 2016.

R. Iskander, M. Louërat, and A. Kaiser, Hierarchical sizing and biasing of analog firm intellectual properties, Integration, the VLSI Journal, pp.172-188, 2013.
DOI : 10.1016/j.vlsi.2012.01.001

URL : https://hal.archives-ouvertes.fr/hal-01287767