Packet processing speeds in software today can hardly support the speed available on network interfaces. Consequently, many solutions that try to accelerate the processing by using programmable hardware have appeared recently. TRILL protocol is implemented by devices called RBridges which introduce Layer 3 routing features into link layer and serve for communication within a data center. However connection throughput might be affected due to the fact that on each hop, processing of the TRILL header needs to be done in order to decide what is the next hop MAC address. Therefore, our idea was to offload the TRILL data plane on the programmable card in order to improve the network performance, mainly to increase the throughput and to decrease the delay. For this purpose we use Massively Parallel Processor Array (MPPA) which integrates 256 processing engine (PE) cores distributed across 16 compute clusters and use a programming model based on POSIX (Portable Operating System Interface) threads.