Design and Modeling of ADPLL with sliding-window for wide range frequency tracking

Chuan Shan 1 Dimitri Galayko 1 François Anceau 1
1 CIAN - Circuits Intégrés Numériques et Analogiques
LIP6 - Laboratoire d'Informatique de Paris 6
Abstract : An architecture of All-Digital Phase-Locked Loop (ADPLL) with sliding window for wide range frequency tracking is proposed to reduce energy consumption and to accelerate convergence. A synthesizable VHDL model is created for this circuit. Simulation and syntheses results demonstrate high performance of the new architecture.
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Chuan Shan, Dimitri Galayko, François Anceau. Design and Modeling of ADPLL with sliding-window for wide range frequency tracking. New Circuits and Systems Conference (NEWCAS), 2012 IEEE 10th International, Jun 2012, Montreal, Canada. pp.269 - 272, ⟨10.1109/NEWCAS.2012.6329008⟩. ⟨hal-01053756⟩

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