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The Effect of S-box Design on Pipelined AES Using FPGAs

Abstract : This work discuses the difference between three methods are used to implement S-box stage of AES. BRAM, composite field, and ROM are these methods. The comparison is based on FPGA implementation of these methods.
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Conference papers
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https://hal.sorbonne-universite.fr/hal-01265624
Contributor : Roselyne Chotin <>
Submitted on : Monday, February 1, 2016 - 1:41:42 PM
Last modification on : Friday, January 8, 2021 - 5:32:07 PM

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  • HAL Id : hal-01265624, version 1

Citation

Karim Moussa Ali Abdellatif, Roselyne Chotin-Avot, Habib Mehrez. The Effect of S-box Design on Pipelined AES Using FPGAs. Colloque GDR SOC-SIP, Jun 2012, Paris, France. pp.1-4. ⟨hal-01265624⟩

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